
New Original IC STM32L476RCT6
ARM® Cortex®-M4 STM32L4 Microcontroller IC 32-Bit Single-Core 80MHz 256KB (256K x 8) FLASH 64-LQFP (10x10)
- Product Introduction
Product Attributes
|
TYPE |
DESCRIPTION |
|---|---|
|
Category |
Integrated Circuits (ICs) Embedded Microcontrollers |
|
Mfr |
STMicroelectronics |
|
Series |
STM32L4 |
|
Part Status |
Active |
|
Core Processor |
ARM® Cortex®-M4 |
|
Core Size |
32-Bit Single-Core |
|
Speed |
80MHz |
|
Connectivity |
CANbus, I2C, IrDA, LINbus, MMC/SD, QSPI, SAI, SPI, SWPMI, UART/USART, USB OTG |
|
Peripherals |
Brown-out Detect/Reset, DMA, LCD, PWM, WDT |
|
Number of I/O |
51 |
|
Program Memory Size |
256KB (256K x 8) |
|
Program Memory Type |
FLASH |
|
EEPROM Size |
- |
|
RAM Size |
128K x 8 |
|
Voltage - Supply (Vcc/Vdd) |
1.71V ~ 3.6V |
|
Data Converters |
A/D 16x12b; D/A 2x12b |
|
Oscillator Type |
Internal |
|
Operating Temperature |
-40°C ~ 85°C (TA) |
|
Grade |
- |
|
Qualification |
- |
|
Mounting Type |
Surface Mount |
|
Supplier Device Package |
64-LQFP (10x10) |
|
Package / Case |
64-LQFP |
|
Base Product Number |
STM32L476 |
General description
The STM32L476xx devices are ultra-low-power microcontrollers based on thehigh-performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up to80 MHz. The Cortex-M4 core features a Floating point unit (FPU) single precision thatsupports all Arm® single-precision data-processing instructions and data types. It alsoimplements a full set of DSP instructions and a memory protection unit (MPU) whichenhances application security.The STM32L476xx devices embed high-speed memories (flash memory up to 1 Mbyte, upto 128 Kbyte of SRAM), a flexible external memory controller (FSMC) for static memories(for devices with packages of 100 pins and more), a Quad SPI flash memories interface(available on all packages) and an extensive range of enhanced I/Os and peripheralsconnected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix.The STM32L476xx devices embed several protection mechanisms for embedded flashmemory and SRAM: readout protection, write protection, proprietary code readoutprotection and Firewall.
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